Explain what would describe the non-blocking architecture deployed in M-series switches.

A.
Memory based operations which fence partitions of memory into bit-buckets for data delivery

B.
Allows frames to be sent to destination ports based on the receiving ports availability

C.
Allows memory segmentation across the s/bar platform permitting data re-direction based on ASIC availability

D.
Switch operations which move data across the bus into CMM and finally to MPC for delivery