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You are here: Home > CompTIA Exam Questions > 220-701 (v.1) > Which of the following chipsets is responsible for controlling the data flow between the RAM and the processor

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Which of the following chipsets is responsible for controlling the data flow between the RAM and the processor

seenagapeApril 17, 2014

Which of the following chipsets is responsible for controlling the data flow between the RAM and
the processor?

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A.
Northbridge

B.
DMA controller

C.
CMOS

D.
Southbridge

Explanation:

In 220-701 (v.1)Exam 220-701 (update April 10th, 2014)

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