What can you do to optimize memory performance?

A.
Enable Advanced Memory Buffer.

B.
Rearrange existing memory to allow interleaving.

C.
Implement memory caching

D.
Configure processor interleaving.

Explanation:
Industry Standard Architecture – Student Guide 1 – Page 124:
Bank interleaving
SDRAM divides memory into two to four banks for simultaneous access to more data.
This division and simultaneous access is known as interleaving.
In two-way interleaving while one memory bank is being accessed, the other bank remains ready
to be accessed. Thus the processor can initiate a new memory access before the previous access
has been completed, resulting in continuous data flow and increasing the amount of data
accessed in a single memory access.
When data is written to memory, the memory controller distributes the data across DIMMs in a
bank. When the processor sends a read request to the memory controller, the memory controller
sends the request to all DIMMs in the bank simultaneously. The data at the requested address is
returned along with data from subsequent sequential addresses. The memory controller
interleaves the data from all the DIMMs to put it back in its original order.
Because more than one DIMM is used in this transaction, the amount of data that can be written or
read is larger than if a single DIMM were used. For example, in dual-interleaved memory, where
two DIMMs are used, the processor can read and write twice the amount of data in one memory
access. In four-way interleaved memory, the processor can read and write four times the amount
of data in one memory access.